How to Prevent the Causes of Device Failures using high-speed PCB?

How to Prevent the Causes of Device Failures using high-speed PCB?

high-speed-PCB

With speed emerging as a crucial factor in product performance, designs are often known to have a number of high-speed interfaces. It is therefore not surprising that signal as well as power integrity issues are often seen which in turn lead to device failure. In fact it is becoming increasingly important for design engineers to take into account the analog features of high speed PCB design.

To achieve signal Integrity of SI as it is popularly called, PCB paths need to be well-defined. In turn these well-defined paths allow that the signal is delivered from the driver to the receiver at the right time. On the other hand, if the design has poor SI, it is not likely to deliver the signal at the right time. A poor SI is also known to cause radiated emissions that are higher than acceptable. Issues in design can also lead to device failure causing it not to function at all.

Design elements that aid in achieving high speed SI:

Transmission line behavior at high-speed frequencies- With clock rates and signal speeds increasing, the PCB trace lengths are on the same order of length as the edge rates passing them. Delays and losses therefore need to carefully weighed. The most common transmission line impedance to achieve is 50 Ω. To achieve the required impedance the material of the PCB, its trace width in each layer need to be identified. The two commonly used transmission lines include the stripline as well as the microstrip. While stripline has the signal trace in between two reference planes, in the case of microstrip, the signal trace is routed on the outer layer. It is the signal speed requirement as well as the design complexity that determines whether stripline or microstrip needs to be used. Overall, microstrip is known to offer a faster signal path.

While considering signal trace, it is also important to choose a short trace with an undisrupted reference plane. The advantage with this is that current can travel to the receiver and return through the path of least impedance. The common return path problems include the following:

  • Discontinuity in reference plane
  • Change of layer of routed signal with no reference plane underneath

In turn, the above leads to signal reflection and ringing. Signal reflections can be a function of the driver, transmission line or receiver impedance. If the signal encounters a change in the impedance of the PCB, (known as impedance discontinuity), the signal can reflect back to its source and this can result in the distortion of the signal. In case of multiple reflections, ringing is a consequence. On the other hand if the driver, transmission line and receiver have the same impedance, the problems of reflection and ringing will not occur.

Another problem that arises is that of crosstalk. This is a result of coupling of signals and can occur if multiple signals couple if they are routed too close. Crosstalk can be prevented if the trace and return paths are twice the trace width away from other signals. Ringing can also increase crosstalk.

Some of the other factors that need to be kept in mind include:

  • Termination Topology
  • Lengths of traces
  • Speed of signals
  • Shape of traces, among others

In order to maintain SI, therefore, the following need to be kept in mind:

  • Identify high speed signals.
  • Ensure that the highest speed signals are on the top and bottom layers.
  • Signal traces should be kept one dielectric away from the return path.
  • Ensure good ground references are given
  • Maintain greater than 2x line width rule for inter-pair spacing.
  • Ensure there is more than 3x line width spacing from other interfaces.
  • Right- angle turns need to be avoided
  • Number of vias need to be minimized
  • High speed signals need to be kept away from noisy signals.

Power integrity

A power delivery network or PDN provided inside the system that complies with the power supply conditions, leads to power integrity. Compared to SI, Power Integrity is more difficult to visualize as there are numerous nodes and each node can impact the overall impedance. Issues related to PI are therefore harder to troubleshoot. A through study of Pi both in the pre & post layout PCB design stage is therefore imperative. PI study today involves studies for loading at high frequencies.

The key in PI analysis is to treat power rails as transmission planes and analyze their characteristic impedances. The other issue is that there is different impedance in different frequencies and therefore components as well as placement locations need to be carefully worked on.

If you have any requirements or inquiries related PCB manufacturing, simply drop an inquiry at sales@mermarinc.com.

Last Update: March 13th, 2018

Leave a Reply

Your email address will not be published.